CCE
M.B. Khalsa College
Bsc IInd Year (3rd Semester)
Electronics Paper II: Digital Electronics II (EL-2102)
Objective
Q1. The main advantage of Schottky TTL logic is its least:
(a) Power dissipation (b) Propagation delay (c) Fan-In (d) none of these.
Q2. A Flip-Flop may be built with:
(a) NAND gates (b) AND gates (c) AND plus OR gate (d) Any of the above.
Q3. Shifting the contents of a shift register, left by one place, equivalent to:
(a) Dividing the contents by 10 (b) Dividing the contents by 2 (c) Multiplying the
contents by 2 (d) none of these.
Q4. In Sequential circuits memory elements are: (a) Astable (b) monostable (c) bistable (d) Tri-state flip-flops.
Q5. An ADC, with 8-bit output, giving full deflection for 12V analog signal, its resolution is: (a) 8/12 V (b) (8*12) mV (c) 8/256 V (d) 12/256 V.
Subjective Questions
Q1. Explain TTL NAND & NOR Gate with suitable diagram.
Q2.What is meant by Racing Condition and Race Around condition in flip-flop?
Q3. Explain Master Slave JK flip-flop. Why Master Slave flip-flops is preferred Over JK Flip Flop.
Q4. Distinguish between Synchronous & Asynchronous Counter. What are important Applications of Counter?
Q5. What do you understand by term Accuracy and Resolution of an ADC?
Q6. What is Totem-Pole connection? Why it is so called? Explain it’s working & advantages when used in TTL circuits.
Q7 List the main characteristics of CMOS logic family & compare with TTL logic family.
Q8. What are different forms of triggering flip-flops? Explain each one with example.
Q9. Explain the operation of PIPO & PISO shift register with the help of a diagram.
Q10. Explain the operation of Bi-directional shift register with the help of a diagram.
Q11. Explain Asynchronous mod-6 up counter with the help of a timing diagram.
Q12. Describe the operation of BCD down counter with help of timing diagram.
Q13. Explain R-2R ladder digital to analog converter (DAC) with help of diagram.
Q14. Explain Continuous analog to digital converter (ADC) with help of diagram.
M.B. Khalsa College
Bsc IInd Year (3rd Semester)
Electronics Paper II: Digital Electronics II (EL-2102)
Objective
Q1. The main advantage of Schottky TTL logic is its least:
(a) Power dissipation (b) Propagation delay (c) Fan-In (d) none of these.
Q2. A Flip-Flop may be built with:
(a) NAND gates (b) AND gates (c) AND plus OR gate (d) Any of the above.
Q3. Shifting the contents of a shift register, left by one place, equivalent to:
(a) Dividing the contents by 10 (b) Dividing the contents by 2 (c) Multiplying the
contents by 2 (d) none of these.
Q4. In Sequential circuits memory elements are: (a) Astable (b) monostable (c) bistable (d) Tri-state flip-flops.
Q5. An ADC, with 8-bit output, giving full deflection for 12V analog signal, its resolution is: (a) 8/12 V (b) (8*12) mV (c) 8/256 V (d) 12/256 V.
Subjective Questions
Q1. Explain TTL NAND & NOR Gate with suitable diagram.
Q2.What is meant by Racing Condition and Race Around condition in flip-flop?
Q3. Explain Master Slave JK flip-flop. Why Master Slave flip-flops is preferred Over JK Flip Flop.
Q4. Distinguish between Synchronous & Asynchronous Counter. What are important Applications of Counter?
Q5. What do you understand by term Accuracy and Resolution of an ADC?
Q6. What is Totem-Pole connection? Why it is so called? Explain it’s working & advantages when used in TTL circuits.
Q7 List the main characteristics of CMOS logic family & compare with TTL logic family.
Q8. What are different forms of triggering flip-flops? Explain each one with example.
Q9. Explain the operation of PIPO & PISO shift register with the help of a diagram.
Q10. Explain the operation of Bi-directional shift register with the help of a diagram.
Q11. Explain Asynchronous mod-6 up counter with the help of a timing diagram.
Q12. Describe the operation of BCD down counter with help of timing diagram.
Q13. Explain R-2R ladder digital to analog converter (DAC) with help of diagram.
Q14. Explain Continuous analog to digital converter (ADC) with help of diagram.